Leaving Ultra-Pristine Surfaces

Lam Research photoresist strip for logic and memory


Technology: Dry Strip
Solutions: Transistor, Interconnect, Patterning, Advanced Memory

Strip processes remove photoresist material after it has served to “protect” certain areas of the wafer surface from being altered. Critical to ensuring finished devices are patterned correctly, these processes must gently yet thoroughly remove photoresist and any residues in and around a range of feature shapes without altering surface materials.

Lam’s production-proven GAMMA product family systems provide the process flexibility needed to carefully and selectively remove all photoresist for a range of critical front-end wafer processing applications.

Lam Researc EOS


Technology: Spin Wet Clean
Solutions: Transistor, Interconnect, Patterning, Advanced Memory

Wet wafer cleaning is used between chip-processing steps to remove yield-limiting residues and defects. Continued device scaling, increasingly complex structures, and new materials bring additional defect removal challenges and also drive the need for increased wafer clean productivity.

As the latest of Lam’s wet clean products, EOS delivers exceptionally low on-wafer defectivity and high throughput to address progressively demanding wafer cleaning applications, including emerging 3D structures.

Lam Research single-wafer clean – spin wet clean

DV-Prime® and Da Vinci®

Technology: Spin Wet Clean
Solutions: Transistor, Interconnect, PatterningPackaging

Wafer cleaning is performed repeatedly during semiconductor device manufacturing and is a critical process that affects product yield and reliability. Unwanted microscopic materials – some no bigger than the tiny structures themselves – need to be cleaned effectively. At the same time, these processes must selectively remove residues that are chemically similar to the device films.

Based on Lam’s pioneering single-wafer spin technology, our DV-Prime and Da Vinci products provide the process flexibility needed with high productivity to address a wide range of wafer cleaning steps throughout the manufacturing process flow.

Lam Research wet clean for packaging

SP Series Product Family

Technology: Spin Wet Clean
Solutions: Packaging

For advanced wafer-level packaging (WLP), the wet clean steps used between processes that form the package and external wiring have surprisingly complex requirements. These processes are called on to completely remove specific materials and leave others undisturbed while working around hundreds of fragile structures.

With a broad range of process capability, Lam’s SP Series products deliver cost-efficient, production-proven wet clean/wet etch solutions for these challenging WLP applications.

Lam Research single-wafer clean – plasma bevel clean

Coronus®  Product Family

Technology: Plasma Bevel Clean
Solutions: Transistor, Interconnect, Patterning, Advanced Memory

Bevel cleaning removes unwanted particles, residues, and films from the edge of a wafer between manufacturing steps. If not cleaned, these materials can flake off and be re-deposited on the front surface of the wafer during subsequent processes. Even a single particle that lands on a critical part of a device can ruin the entire chip. By inserting bevel clean processes at strategic points, these potential defects can be eliminated and more good chips produced.

By combining the precise control and flexibility of plasma with technology that protects the active die area, Lam’s Coronus bevel clean family cleans the wafer’s edge to enhance die yield.


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