SABRE Product Family
Electrochemical Deposition (ECD)
Copper deposition lays down the electrical wiring for the most advanced semiconductor devices. Even the smallest defect – say a microscopic pinhole or dust particle – in these conductive structures can impact device performance, from loss of speed to complete failure.
Lam’s SABRE® ECD product family, which helped pioneer the copper interconnect transition, offers the precision needed for copper damascene manufacturing on the industry’s productivity-leading platform.
In leading-edge chip designs, advanced interconnect structures involve narrow geometries and complex film layers that require increasingly flexible and precise copper deposition capability. Challenges for electrochemical deposition of copper (Cu) include providing void-free fill, low defects, low resistivity, and the ability to fill high aspect ratio (HAR) structures while delivering high-productivity performance. Continual thinning of the barrier/seed stack along with line width shrinkage requires increasingly stringent process control to achieve sufficient bottom-up fill rate while protecting the seed layer. The broad range of feature geometries in a single logic layer requires a wide process window to ensure proper filling of structures with large variations in aspect ratio, seed coverage, and density.
Key Customer Benefits
- High-throughput, void-free fill with superior defect density performance for advanced technology nodes
- Widest process window and highest rates of bottom-up growth to fill the most challenging HAR features
- Direct deposition of Cu on various liner materials, important for next-generation metallization schemes
- Technologies that protect the seed layer during plating initiation, while enabling excellent cross-wafer fill uniformity
- Increased usable die area through industry-leading process edge exclusion to improve the number of yielding chips per wafer
- SABRE® Extreme
- SABRE® Max
- SABRE® Excel
- Logic interconnect
- Memory interconnect