Vantex Product Family

Memory cost per bit scaling requires customers to address multiple challenges associated with aggressive vertical scaling of device designs, etching multiple features simultaneously and implementing complex new integration schemes. Vertical scaling requires etching to new depths while maintaining the same feature CD to maintain the same lateral device density. Vertical directionality of the etch becomes critical as small deviations in ion angle can result in large displacement of the feature and thus reduce device yield. Combining multiple etches to reduce costs requires that this performance is achieved for features with different CDs and shapes simultaneously. Customers’ advanced integration schemes add complexity of multiple materials being exposed requiring increasing selectivity control.