DSiE Product Family - Lam Research

DSiE Product Family

DSiE Product Family


Etch technology is required in all integrated circuit (IC) production to help shape a chip’s intricate features. For microelectromechanical systems (MEMS) manufacturing processes, it is used to carve out the widely varying features that form physical structures such as large cavities and high aspect ratio (HAR) deep trenches.

Lam’s DSiE™ product family delivers exceptional process control at high productivity for several critical and non-critical deep silicon etch applications, including MEMS, power devices, passive components, sensors, and transducers.

Industry Challenges

In the MEMS industry, the numerous feature shapes created using etch each involve a different set of process criteria. For critical applications like structures for gyroscopes and inertial sensors, excellent etch profile angle, tilt, asymmetry, and uniformity control are needed. Semi-critical through-silicon vias (TSVs), which are used in three-dimensional packaging of these devices, require excellent profile angle and depth uniformity as does trench etch in power devices. Non-critical MEMS applications, such as wafer-level packaging (WLP) cap etch, need high throughput, depth uniformity, and sidewall smoothness. Meeting this wide range of etch criteria while maintaining high productivity is quite challenging. Another key challenge is achieving cost efficiency because of the small-volume production runs for many of these devices.

Key Customer Benefits

  • High etch rates and productivity with flexibility to use both Bosch and steady-state processes
  • Tunable depth uniformity delivered through gas flow ratio and transformer coupled capacitive tuning capabilities
  • Advanced control for improved symmetry and tilt minimization
  • Tunable CD enabled through fast gas switching

Product Offerings Pro

  • DSiE™ III
  • DSiE™ F Series
  • DSiE™ G Series

Key Applications

  • Deep silicon etch for MEMS (trench, cavity)
  • Silicon trench etch for power devices
  • Through-silicon via for wafer level packaging