Patterning involves the set of process steps – including lithography, deposition, and etch – that create the extremely small, intricate features of an integrated circuit. With each new generation, device dimensions continue to shrink. For advanced structures, these feature sizes can be too small and/or packed too closely together for conventional lithography, the step that transfers the chip design’s intricate detail from the mask “template” onto the wafer. To compensate, chipmakers are using advanced techniques like double/quadruple and spacer-based patterning, involving multiple masks and process sets. Even as these approaches ease lithography limitations, they create new demands for exceptional process precision and film quality in order to accurately produce the fine, dense features required.