Patterning involves the set of process steps – including lithography, deposition, and etch – that create the extremely small, intricate features of an integrated circuit. With each new generation, device dimensions continue to shrink. For advanced structures, these feature sizes can be too small and/or packed too closely together for conventional lithography, the step that transfers the chip design’s intricate detail from the mask “template” onto the wafer. To compensate, chipmakers are using advanced techniques like double/quadruple and spacer-based patterning, involving multiple masks and process sets. Even as these approaches ease lithography limitations, they create new demands for exceptional process precision and film quality in order to accurately produce the fine, dense features required.
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MARCH 23, 2015
Have you ever wondered how everyday electronics, like smartphones and tablets, pack so much functionality into such relatively small and lightweight packages? If so, here’s your chance to learn a bit more about one of the key technologies behind making these complex devices so compact – multiple patterning – which was also one of the hot topics at the recent SPIE Advanced Lithography Symposium.
NOVEMBER 28, 2016
Did you know that different patterns require different types of multiple patterning? Today’s advanced chips are more complex than ever before, with transistors and other structures that are smaller and more densely packed. To create those tiny features, chipmakers have developed multiple multiple patterning strategies that enable much finer dimensions than current lithography can achieve.